IPDRM 2025
Seventh Annual Workshop on Emerging Parallel and Distributed Runtime Systems and Middleware
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St.Louis, Missouri, USA.
Held in conjunction with the International Conference for High Performance Computing, Networking, Storage and Analysis, (SC 25), November 16-21, 2025, St. Lousi, Missouri, USA.
Submission deadlines: TBA
Overview
The role of runtime and middleware has evolved over the past several years as we have begun the exascale era. For leadership class machines, advanced runtime technology not only plays an important role in task scheduling and management but also has gained prominence in providing consistent memory across accelerator architectures, intelligent network routing, and performance portability, among other properties. With diminishing returns from hardware fabrication technology, clusters are beginning to include more specialized accelerators such as FPGAs, CGRAs, and custom ASICs. For popular domains such as machine learning, we have observed the return of the stand-alone appliance – i.e., highly specialized co-designed software/hardware products sold as black box units that are efficient at solving a popular (although narrow) problem space. These platforms highlight middleware challenges such as task and data management while adding new opportunities for the exploitation of application-specific engines. Further, advances in fields such as AI/ML provide new and exciting opportunities for guiding and exploiting the hardware/software substrate. This workshop aims to attract the international research community to share new and bold ideas that will address the challenges of design, implementation, and evaluation of future runtime systems and middleware.
This year, we will have a special emphasis on middleware that connects AI/ML to HPC systems. There are several challenges associated with the support of complex AI workflows leveraging heterogeneous compute and memory resources. For example, many challenges in the interaction between Python-based distributed deep learning frameworks and the underlying hardware and the implications for memory and communication management.
Topics
This workshop will emphasize novel, disruptive research ideas over incremental advances. We will solicit papers on topics including, but not limited to, the following areas:
Runtime System/Middleware Techniques. Design, and Evaluation
- Runtime/Middleware for exascale/large scale computing
- Runtime/Middleware for accelerators or appliances
- Network and I/O middleware technology
- Modeling and Performance Analysis of Runtime Systems
- Interactions between runtime and middleware
- Runtime-architecture co-design
- Tuning and optimization studies
- Workflow/application-centric challenges and solutions for runtime systems
Constraints and Issues for Runtime Systems and Middleware
- Energy- and Power-aware schemes
- Fault Tolerance and Reliability
- Heterogenous resource management
- Data movement
- Memory models
- Scalability
Design Principles and Programming Support
- High-level programming models (e.g., thread and task based models, data parallel models, and stream programming) and domain-specific languages
- Programming frameworks, parallel programming, and design methodologies
- Methodologies and tools for runtime and middleware design, implementation , verification, and evaluation
- Wild and crazy ideas on future Runtime System and Middleware
Submissions
- Extended Paper Submission: TBA
- Paper Notification: TBA
- Final Paper Due: TBA
Submission Guidelines:
Full submission will be up to 8 pages long using the same format as the SC25 conference (i.e. using the ACM conference template). This limit includes all materials (figures, bibliography, appendixes, etc). All submitted papers will undergo a rigorous review process and each will have at least three reviews by members of the program committee. Papers will be accepted based on their technical contributions. “Crazy and Wild ideas” are welcome. Accepted papers will have quick lighting presentations on the workshop day to spark conversation and discussion. Papers can be submitted at SC Submission site
Organizing Committees
General Chairs
- Barbara Chapman, HPE, USA
- Shirley Moore, University of Texas at El Paso, USA
- Eun Jun Park, Qualcomm, USA
- Joshua Suetterlein, Pacific Northwest National Laboratory, USA
Program Chair
- Oceane Bel, Pacific Northwest National Laboratory, USA
Program Committee
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Distinguished Speaker
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Bio
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Title
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Program
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